1. Field of the Invention
The present invention relates generally to semiconductor packages, and more particularly to a punch quad flat no leads (QFN) semiconductor package which includes one or more leads exposed in the package body of the semiconductor package in a manner making such lead(s) suitable for electrical connection to a conformal shield of the semiconductor package.
2. Description of the Related Art
Semiconductor dies are conventionally enclosed in plastic packages that provide protection from hostile environments and enable electrical interconnection between the semiconductor die and an underlying substrate such as a printed circuit board (PCB) or motherboard. The elements of such a package comprise a metal leadframe, an integrated circuit or semiconductor die, bonding material to attach the semiconductor die to the leadframe, bond wires which electrically connect pads or contacts on the semiconductor die to individual leads of the leadframe, and a hard plastic encapsulant material which covers the other components and forms the exterior of the semiconductor package, commonly referred to as the package body.
The leadframe is the central supporting structure of such a package, and is typically fabricated by chemically etching or mechanically stamping a metal strip. A portion of the leadframe is internal to the package, i.e., completely surrounded by the plastic encapsulant or package body. Portions of the leads of the leadframe may extend externally from the package body, or may be partially exposed therein for use in electrically connecting the semiconductor package to another component. In certain semiconductor packages, a portion of the die pad of the leadframe also remains exposed within the package body.
In an often used methodology for fabricating a plurality of the above-described semiconductor packages, a matrix of interconnected leadframes are etched into a leadframe strip. Subsequent to the attachment of the semiconductor dies to respective ones of the die pads of the leadframes and the electrical connection of the pads of the semiconductor dies to the leads of the corresponding leadframes, an encapsulation step facilitates the application of the encapsulant material onto the surface of the leadframe strip to which the semiconductor dies are attached. This encapsulation step covers the semiconductor dies, the side surfaces of the die pads, and portions of the leads within a single block of encapsulant material. The encapsulant material is then hardened, with a cutting step thereafter being used to separate individual semiconductor packages from each other and from the disposable portions of each of the leadframes within the leadframe strip. The cutting step severs the connection between each of the interconnected leadframes within the leadframe strip, and the die pad and leads of each individual leadframe. This cutting or “singulation” process is typically accomplished through either a sawing process (saw singulation) or a punching process (punch singulation). As indicated above, the formation of the individual leadframes within the leadframe strip is itself typically accomplished through either a chemical etching or mechanical stamping process.
One type of semiconductor package commonly including a leadframe is a quad flat no leads (QFN) package. QFN semiconductor packages or devices are particularly advantageous for their smaller size and superior electrical performance. A typical QFN package comprises a thin, generally square package body defining four peripheral sides of substantially equal length. Exposed in the bottom surface of the package body are portions of each of the leads, such exposed portions defining lands or terminals which are used to facilitate the electrical connection of the QFN package to an external device. The lands or terminals defined by the leads are typically segregated into four sets, with the terminals of each set extending along a respective one of the four peripheral sides of the package body. The semiconductor die is itself mounted to a die pad of the QFN package leadframe, with that surface of the die pad opposite to that which the semiconductor die is attached sometimes being exposed in that surface of the package body in which the terminals defined by the leads are also exposed. As indicated above, the pads or contacts of the semiconductor die are electrically connected to the leads, and typically the top surfaces of the leads which are opposite the bottom surfaces thereof defining the exposed terminals.
In standard QFN packages formed through the use of punch singulation, distal or outer end portions of the top surfaces of the leads are also exposed in the fully formed package body. In addition, distal, outer end portions of the top surfaces of the tie bars extending from respective corners of the die pad are also exposed in the same surface of the package body in which the outer end portions of the top surfaces of leads are exposed. In punch QFN packages having a black top or ED design, the package body is formed such that only the lands or terminals defined by the leads and one surface of the die pad are exposed therein, i.e., the outer end portions of the top surfaces of the leads and tie bars are covered by the package body.
As the art has moved to smaller, lighter weight, and higher frequency electronic devices such as cellular telephones, semiconductor packages utilized in these electronic devices are increasingly placed closer to other electronic components and structures. Due to this reduced spacing, radiation such as electromagnetic or radio frequency (RF) radiation emanating from a semiconductor package has a greater probability of interfering with the normal operation of an adjacent electronic component, and vice-versa. To prevent such unacceptable electromagnetic interference, it is known in the prior art to apply a conformal radiation shield to the package body of the semiconductor package.
In those QFN packages to which a conformal shield is applied, it is advantageous to place such conformal shield into electrical communication with one or more of the tie bars and/or one or more of the leads of the semiconductor package. However, for punch QFN packages having the aforementioned black top or ED design, such electrical communication between the conformal shield and the leads and/or tie bars is not possible since, as indicated above, the tie bars are completely covered by the package body, as are the top surfaces of the leads opposite the terminals defined by the bottom surfaces thereof. Though outer end portions of the top surfaces of the leads and tie bars are typically exposed in the package body of the standard punch QFN package also described above, it is often not desirable to have to electrically connect all of the leads and tie bars to the conformal shield subsequently formed on the package body. The present invention addresses this issue by, among other things, providing a punch QFN package in which the outer end portions of the top surfaces of only one or more selected leads and/or tie bars is/are exposed, thus allowing for the electrical connection of the conformal shield thereto. These, as well as other features and advantages of the present invention will be discussed in more detail below.